Chineasthetik by Scarab [web]
screenshot added by scicco on 2002-08-19 11:05:55
platform :
type :
release date : august 2002
release party : TRSAC 2002
compo : amiga demo
ranked : 1st
  • 8
  • 8
  • 1
popularity : 58%
  • 0.41
alltime top: #11899
added on the 2002-08-19 11:05:55 by scicco scicco

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ah, finally a 68k demo again :) i liked the music and parts of the synching, but overall it felt too static.
added on the 2002-08-19 14:18:15 by robotriot robotriot
this is a test on concentration, "how long can you wait for the demo until you press rmb?" , not to long iam afraid ;-)
added on the 2002-08-19 14:26:41 by Hatikvah Hatikvah
hmm... the concept was good, but it gets boring when there's nothing else than just flares :/
added on the 2002-08-20 07:26:23 by dairos dairos
Obviously not really fast-paced but it's nice to watch anyway... and it's one of the few recent demos that are watchable on a 030.
added on the 2002-09-10 20:38:34 by exocet exocet

in a strange way i liked this demo even if really nothing much was in.. really weird. definately not among my favorites, but a nice watch one per year.

drawback is it is way too slow on 040/25..

added on the 2002-09-30 12:44:38 by raver raver
Not many effects inside, more a design demo but I like it anyway.
rulez added on the 2005-04-23 10:59:07 by ghandy ghandy
rulez added on the 2005-06-22 20:50:49 by wayne wayne
liked the gfx and design and flow, a nice melancholy feeling :)
rulez added on the 2005-10-07 02:06:42 by keito keito
I like this neat piece of design.
rulez added on the 2005-10-07 02:09:23 by ALiEN^bf ALiEN^bf
Got boring after a while, but its nice enough for a thumb!
rulez added on the 2006-08-30 12:26:39 by xeron xeron
I think I saw a flare there
added on the 2007-12-11 23:24:48 by Maissi Maissi
China :)
rulez added on the 2012-09-03 20:20:50 by Sir_Lucas Sir_Lucas
Slow code, the rest is quite OK.
sucks added on the 2019-05-31 20:15:29 by AlienTech AlienTech
Nice demo, I like it.
rulez added on the 2019-05-31 20:17:49 by ham ham
design and music
rulez added on the 2019-05-31 21:47:48 by SiR SiR
Slow code

Thank you for your constructive criticism. Could you please give me some hints how to make the code faster? I'd be really grateful receiving lots of optimisation hints from you. Thanks in advance!
added on the 2019-06-01 00:00:41 by StingRay StingRay
Pro tip: All you need is a really fast RAM. That's the panacea! :]
added on the 2019-06-01 00:58:22 by ham ham

Not only me noticed a bit of slowness, too bad because the prod is interesting.
A way to improve it could be to reshape the code to take advantage of the cpu cache memories.
Or just raise the requirements (060).
added on the 2019-06-01 09:00:27 by AlienTech AlienTech
And the award for the most clueless comment goes to: Alientech
added on the 2019-06-01 09:51:00 by britelite britelite

It would be actually cool to see a version optimized for 040 where the cpu caches are not that limited (like in 020, 030) (...).
added on the 2019-06-01 09:58:49 by AlienTech AlienTech
A way to improve it could be to reshape the code to take advantage of the cpu cache memories.

Thank your for your optimisation tips. Here's a part of the code:

Code:FX_C2P1x1INIT lea .TAB(pc),a0 lea FX_C2P1x1_Routine(pc),a1 move.l FX_CPUTYPE(pc),d7 and.w #$ff,d7 ror.b #4,d7 move.l a0,a2 add.w 2(a2,d7.w*4),a2 ; offset to c2p routine move.l a2,(a1) ; store ptr to c2p routine add.w (a0,d7.w*4),a0 ; offset to c2p init routine jmp (a0) ; execute c2p_init routine .TAB dc.w c2p1x1_000_init-.TAB,c2p1x1_000-.TAB ; 68000 dc.w c2p1x1_010_init-.TAB,c2p1x1_010-.TAB ; 68010 dc.w c2p1x1_030_init-.TAB,c2p1x1_030-.TAB ; 68020 dc.w c2p1x1_030_init-.TAB,c2p1x1_030-.TAB ; 68030 dc.w c2p1x1_040_init-.TAB,c2p1x1_040-.TAB ; 68040 dc.w 0,0 ; Dummy dc.w c2p1x1_040_init-.TAB,c2p1x1_040-.TAB ; 68060 FX_C2P1x1_Routine dc.l 0 CNOP 0,4 FX_DO_C2P1x1 move.l FX_C2P1x1_Routine(pc),a2 jmp (a2)

I will now inform myself about cpu cache memories so I can write faster code in the future. Thank you for your tips, they are appreciated!

Ham: Thanks for the pro tip. :D
added on the 2019-06-01 11:38:07 by StingRay StingRay

Thanks for the explanation.
I guess the c2p is only the final stage of the rendering pipeline.
Do you think other optimizations are possible at early stages?

I was also meaning a code entirely written for the 040.
Thanks to the pipeline, after a write access to the memory, the 040 can actually execute other instructions which don' t access memory (the so called "free instructions"), without waiting for the previous write to complete, if the code to run is in the cache.
This basically means that when copying data from fast to chip ram, it is also possible to perform a processing of data, without additional time.
Do you think the speed would benefit from it?
added on the 2019-06-01 14:01:41 by AlienTech AlienTech

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