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I built a 16-bit CPU from scratch — RR16X Mk.8.2

I've just released RR16X Mk.8.2, a custom 16-bit CPU architecture I've been building from scratch.

Custom ISA, assembler, C++ emulator, SystemVerilog implementation and extensible peripheral system.

Windows binaries are included in the first release.

Search GitHub for RR16X_Mk.8_logic- if you're interested.

I'm curious what people here think of programming for unusual/custom hardware.

link: https://github.com/alextron700/RR16X_Mk.8_logic-/releases/tag/first_release

This is cool as hell!!!

I had a funny feeling you guys would like this.
please, if you have a moment, tell me:
what did you like?
what would you have done differently?

nice project! I liked that you chose a three-operand form for the ISA since that maps well to SSA (static single assignment) which will pay off when you write e.g. a C compiler for it.

I think it would be a pleasant surprise to find that I've been putting some spare time into actually making a C compiler.

does it fit into 512 bytes like SectorC ? (jk :))

any plans for your CPU ?

e.g. implement it on an FPGA, add a VGA output, run some demo fx ?

would be a cool wild demo !

plans:
- Finish C compiler (and see what ridiculous footprint I get out of it)
- get my hands on an FPGA to get some actual hardware.
- For my emulator, I'd use raylib for graphics.
- I don't know how to make graphics hardware.

current achievements include BASIC in 6.3 KB of ROM.

I looked up sectorC and by golly it's basically perfect as a starter.

I knew you'd like it (SectorC) :) It's not a full C compiler, though (and it has no optimizer - the hard part). Would advise to write a non-size-optimized, non-optimizing one in C++ first and then iteratively refine it. Remember to separate AST optimizations (constant folding, common sub-expr etc) from assembly level optimizations (dead code, peephole, ..).

Regarding graphics hardware: just stick to software rendering. For the display output use VGA, it's quite simple to implement (once did it in software on an STM32 and a hand-soldered resistor ladder for the D/A conversion :D). 'Modern' monitors are quite picky regarding the timings but it's still easy compared to digital protocols.

So, yeah, sounds like a plan, good luck and looking forward to the "product" !

I have no intention of implementing optimizing in compilation. unoptimized suffices for me.
I'd say that what's there is open for people to experiment on as-is. But there are things on it worth working on.

That said, if you know your way around C++, you can easily modify/extend it however you like.